Investigação de soluções em hardware para os filtros de laço do decodificador AV1

Abstract

This work presents a set of dedicated hardware solutions for real-time Ultra High Definition (UHD) video encoding area of the AOmedia video 1 (AV1) video format, launched in 2018. There were developed solutions of the three filters of the AV1 decoder In-Loop Filter. The Filters focused on this thesis are: (i) Deblocking Filter (DBF), (ii) Constrained Directional Enhancement Filter (CDEF) and (iii) Switchable Loop Restoration Filter (SLRF). The In-loop filters are one of the coding and decoding steps of the AV1 and others codecs. They are located in the reconstruction loop and have the main goal of reducing/eliminating artifacts that degrade the video image due the previous steps as quantization and predictions. These artifacts not only affect the visual quality of the reconstructed frames, but also degrade coding efficiency because each reconstructed frame will serve as the reference for coding subsequent frames. Therefore the artifacts reduction contributes to improve the subjective quality and coding efficiency. Dedicated hardware solutions for the In-loop filtering step presenting a trade-off between throughput and energy consumption contributes to the consolidation of this new video format in the market. The dedicated hardware designs implemented in this work can process 4K UHD videos (3840x2160 pixels) in real time at 60 frames per second. All architectures were synthesized to ASIC using a 40 nm TSMC library. The DBF design presents a area of 39.35 Kgates with a total power dissipation of 3.96 mW operating at a frequency of 93.31 MHz. The CDEF design presents a area of 185.36 kgate with a power dissipation of 43 mW at a frequency of 93.38 MHz. For the SLRF were developed the two filters that compose it from two independent implementations, one for the Simetric Separable Normalized Wiener Filter (SSNWF) and other for the Dual Self-Guided Filter (DSGF). The SSNWF presents a area of 37.78 kgates and a power dissipation of 26.36 mW at a frequency of 207.03 MHz. The DSGF presents a area of 177.58 kgates and a power dissipation of 120.21 mw at frequency of 212.86 MHz. At the best of the authors’ knowledge, these are the first dedicated hardware solutions targeting the AV1 decoder In-loop filters presented in the literature.