Análise de métodos de mapeamento tecnológico para dispositivos QCA

Abstract

Nowadays, the advanced methodology and techniques to optimize digital circuits are able to deliver more efficient integrated circuits in terms of area, power and delay. Logic synthesis is one of the main responsible that have collaborated for the success of the CMOS (Complementary Metal-Oxide Semiconductor) technology. Using several algorithms and methods dedicated to optimize logic cells and digital circuits, the logic synthesis cans delivery solutions able to meet design requirements. Examples are the technology mapping algorithms, methods and its related EDA (Electronic Design Automation) tools. Currently, the CMOS technology is widely used to implement integrated circuits. The main element behind this technology is the transistor, which is able to act as a switch inside a logic cell. However, several and recent works have pointed to the need for a future and substitute technology, since the transistor is reaching its physical limits. In this sense, some authors have investigated the QCA (Quantum Cellular Automata) technology as a potential alternative to the CMOS. This work explores the use of logic synthesis, especially in the technology mapping step, to investigate if traditional solutions applied to CMOS are able to release good results for QCA circuits.